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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
UART/IRDA
Preliminary
10-2
Bit CLK
STOP = 1 bit, Parity = Even, Data = 8 bit of 0x55
TX Data
Start
Data (LSB first)
Parity
Stop
RZ Modulation of Data used in IrDA Transmission with PW = 3
Bit CLK
TX Data
TXIrDA
PW
Figure 10.2 Timing Diagram of UART Transmission
10.2 Register Description
Table 10.1 UART/IrDA Register Map (Base Address = 0x80000600)
Name
Address Type
Reset
Description
UTRXD
0x00
R
Unknown
Receiver Buffer Register
UTTXD
0x00
W
Unknown
Transmitter Holding Register
UTDL
0x04
W
0x0000
Divisor Latch Register
UTIR
0x08
R/W
0x000
Interrupt Register
UTCR
0x0C
R/W
0x000
UART Control Register
UTLSR
0x10
R
0x0101
Status Register
IrDACFG1
0x14
R/W
0x0003
IrDA Configuration Register 1
IrDACFG2
0x18
R/W
0x4da1
IrDA Configuration Register 2
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