TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
UART/IRDA
Preliminary
10-4
Interrupt Register (UTIR)
0x80000608
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
ERS
ETX
ERX
0
FRS
FTX
FRX
0
QRS
QTX
QRX
ERS [10]
Type
Interrupt Control
0
R/W
Receiver Line Status interrupt is disabled
1
R/W
Receiver Line Status interrupt is enabled
ETX [9]
Type
Interrupt Control
0
R/W
Transmitter Holding Register Empty interrupt is disabled
1
R/W
Transmitter Holding Register Empty interrupt is enabled
ERX [8]
Type
Interrupt Control
0
R/W
Receiver Data Available interrupt is disabled
1
R/W
Receiver Data Available interrupt is enabled
FRS [6]
Type
Receiver Line Status Flag
0
R
Indicate that Receiver Line Status has not changed
1
R
Indicate that Receiver Line Status has changed
FTX [5]
Type
Transmitter Holding Register Empty Flag
0
R
Interrupt has not generated
1
R
Interrupt has generated, but not cleared
FRX [4]
Type
Receiver Data Available Flag
0
R
Interrupt has not generated
1
R
Interrupt has generated, but not cleared
FRS, FTX, FRX is set or cleared regardless of each enable bit (ERS, ETX, ERX)
settings. It can be used to follow polling method instead of interrupt method.
QRS [2]
Type
Interrupt Flag
0
R
Indicate that Receiver Line Status interrupt has not
generated
1
R
Indicate that Receiver Line Status interrupt has generated
QTX [1]
Type
Interrupt Flag
0
R
Transmitter Holding Register Empty interrupt has not
generated
1
R
Transmitter Holding Register Empty interrupt has
generated
QRX [0]
Type
Interrupt Flag
0
R
Indicate that Receiver Data Available interrupt has not
generated
1
R
Indicate that Receiver Data Available interrupt has generated
QRS, QTX, QRX is only set when each enable bit is set to 1. This flags is used to
distinguish which interrupt has generated the UART flag of IREQ and MREQ register in
interrupt controller.
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