144 / 259 page
TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
UART/IRDA
Preliminary
10-6
Line Status Register (UTLSR)
0x80000610
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
TE
TF
FE
PE
RA
TE [4]
Type
Transmitter FIFO Status
0
At least 1 byte is stored in transmitter FIFO.
1
R
No data is stored in transmitter FIFO
TF [3]
Type
Transmitter FIFO Status
0
At least 1 byte can be stored in transmitter FIFO.
1
R
No data can be stored in transmitter FIFO
Transmitter FIFO depth is fixed to 4.
FE [2]
Type
Framing Status
0
Stop bit is received and correct
1
R
The received data in the FIFO don’t have valid stop bit
PE [1]
Type
Parity Status
0
Parity bit is received and correct
1
R
The received data in the FIFO don’t have valid parity bit
RA [0]
Type
Received FIFO Status
0
No data has been received
1
R
At least 1 received data is stored in the FIFO
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
