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WM8959 Datasheet(PDF) 147 Page - Wolfson Microelectronics plc |
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WM8959 Datasheet(HTML) 147 Page - Wolfson Microelectronics plc |
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147 / 155 page ![]() Pre-Production WM8959 w PP, May 2008, Rev 3.1 147 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0 MBSEL 0b Microphone Bias Voltage Control 0 = 0.9 * AVDD 1 = 0.65 * AVDD R59 (3Bh) 15:0 0000h Reserved - Do Not Change 15:8 00h Reserved - Do Not Change 7 SDM 0b Enable PLL Integer Mode 0 = Integer mode 1 = Fractional mode 6 PRESCALE 0b Divide MCLK by 2 at PLL input 0 = Divide by 1 1 = Divide by 2 5:4 00b Reserved - Do Not Change R60 (3Ch) PLL (1) 3:0 PLLN [3:0] 8h Integer (N) part of PLL frequency ratio. Use values greater than 5 and less than 13. 15:8 00h Reserved - Do Not Change R61 (3Dh) PLL (2) 7:0 PLLK [15:8] 31h Fractional (K) part of PLL frequency ratio (Most significant bits) 15:8 00h Reserved - Do Not Change R62 (3Eh) PLL (3) 7:0 PLLK [7:0] 26h Fractional (K) part of PLL frequency ratio (Least significant bits) R63 (3Fh) to R127 (7Fh) Reserved |
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