LFEC10 datasheet(44/163 Pages) LATTICE

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3-8

DC and Switching Characteristics

Lattice Semiconductor

LatticeECP/EC Family Data Sheet

Differential HSTL and SSTL

Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-

able single-ended output classes (class I and class II) are supported in this mode.

LVDS25E

The top and bottom side of LatticeECP/EC devices support LVDS outputs via emulated complementary LVCMOS

outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in

Figure 3-1 is one possible solution for point-to-point signals.

Figure 3-1. LVDS25E Output Termination Example

Table 3-1. LVDS25E DC Conditions

Parameter

Description

Typical

Units

VOH

Output high voltage

1.42

VOL

Output low voltage

1.08

VOD

Output differential voltage

0.35

VCM

Output common mode voltage

1.25

ZBACK

Back impedance

100

Bourns

CAT16-LV4F12

RS=165 ohms

(±1%)

RS=165 ohms

(±1%)

RD = 140 ohms

(±1%)

RD = 100 ohms

(±1%)

OFF-chip

Transmission line, Zo = 100 ohm differential

VCCIO = 2.5V (±5%)

ON-chip

OFF-chip

ON-chip

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