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LFEC10 Datasheet(PDF) 71 Page - Lattice Semiconductor |
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LFEC10 Datasheet(HTML) 71 Page - Lattice Semiconductor |
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71 / 163 page ![]() 4-5 Pinout Information Lattice Semiconductor LatticeECP/EC Family Data Sheet Pin Information Summary (Cont.) LFECP/EC15 LFECP20/EC20 LFECP/EC33 Pin Type 256-fpBGA 484-fpBGA 484-fpBGA 672-fpBGA 484-fpBGA 672-fpBGA Single Ended User I/O 195 352 360 400 360 496 Differential Pair User I/O 97 176 180 200 180 248 Configuration Dedicated 13 13 13 13 13 13 Muxed 56 56 56 56 56 56 TAP 555555 Dedicated (total without supplies) 208 373 373 509 373 509 VCC 10 20 20 32 16 28 VCCAUX 2 1212201220 VCCPLL 000044 VCCIO Bank0 244646 Bank1 244646 Bank2 244646 Bank3 244646 Bank4 244646 Bank5 244646 Bank6 244646 Bank7 244646 GND, GND0-GND7 20 44 44 63 44 63 NC 0113963 0 Single Ended/ Differential I/O Pair per Bank Bank0 32/16 48/24 48/24 64/32 48/24 64/32 Bank1 18/9 48/24 48/24 48/24 48/24 64/32 Bank2 16/8 40/20 40/20 40/20 40/20 56/28 Bank3 32/16 40/20 44/22 48/24 44/22 64/32 Bank4 17/8 48/24 48/24 48/24 48/24 64/32 Bank5 32/16 48/24 48/24 64/32 48/24 64/32 Bank6 32/16 40/20 44/22 48/24 44/22 64/32 Bank7 16/8 40/20 40/20 40/20 40/20 56/28 VCCJ 111111 Note: During configuration the user-programmable I/Os are tri-stated with an internal pull-up resistor enabled. If any pin is not used (or not bonded to a package pin), it is also tri-stated with an internal pull-up resistor enabled after configuration. |
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