LFEC10 datasheet(19/163 Pages) LATTICE

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2-16

Architecture

Lattice Semiconductor

LatticeECP/EC Family Data Sheet

Table 2-7. Maximum Number of Elements in a Block

Some options are available in four elements. The input register in all the elements can be directly loaded or can be

loaded as shift registers from previous operand registers. In addition by selecting “dynamic operation” in the

‘Signed/Unsigned’ options the operands can be switched between signed and unsigned on every cycle. Similarly

by selecting ‘Dynamic operation’ in the ‘Add/Sub’ option the Accumulator can be switched between addition and

subtraction on every cycle.

MULT sysDSP Element

This multiplier element implements a multiply with no addition or accumulator nodes. The two operands, A and B,

are multiplied and the result is available at the output. The user can enable the input/output and pipeline registers.

Figure 2-19 shows the MULT sysDSP element.

Figure 2-19. MULT sysDSP Element

MAC sysDSP Element

In this case the two operands, A and B, are multiplied and the result is added with the previous accumulated value.

This accumulated value is available at the output. The user can enable the input and pipeline registers but the out-

put register is always enabled. The output register is used to store the accumulated value. A registered overﬂow

signal is also available. The overﬂow conditions are provided later in this document. Figure 2-20 shows the MAC

sysDSP element.

Width of Multiply

x18

x36

MULT

MAC

—

MULTADD

—

MULTADDSUM

—

Multiplier

m+n

(default)

CLK (CLK0,CLK1,CLK2,CLK3)

CE (CE0,CE1,CE2,CE3)

RST(RST0,RST1,RST2,RST3)

Pipeline

Input

Multiplier

Multiplicand

Signed

Shift Register A In

Shift Register B In

Shift Register A Out

Shift Register B Out

Output

Input Data

Multiplier

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