LFEC10 datasheet(20/163 Pages) LATTICE

20 / 163 page

2-17

Architecture

Lattice Semiconductor

LatticeECP/EC Family Data Sheet

Figure 2-20. MAC sysDSP Element

MULTADD sysDSP Element

In this case, the operands A0 and B0 are multiplied and the result is added/subtracted with the result of the multi-

plier operation of operands A1 and A2. The user can enable the input, output and pipeline registers. Figure 2-21

shows the MULTADD sysDSP element.

Figure 2-21. MULTADD

Multiplier

m+n

(default)

m+n+16 bits

(default)

m+n+16 bits

(default)

Input Data

Accumulator

Multiplier

Multiplicand

SignedAB

Shift Register A In

Shift Register B In

Shift Register A Out

Shift Register B Out

Output

Addn

Accumsload

Pipeline

CLK (CLK0,CLK1,CLK2,CLK3)

CE (CE0,CE1,CE2,CE3)

RST(RST0,RST1,RST2,RST3)

Input

Pipeline

Input

Pipeline

Input

Pipeline

Accumulator

Overflow

signal

Multiplier

Add/Sub

Pipe

Reg

Pipe

Reg

m+n

(default)

m+n+1

(default)

m+n+1

(default)

m+n

(default)

Multiplier B0

Multiplicand A0

Multiplier B1

Multiplicand A1

Signed

Shift Register A In

Shift Register B In

Shift Register A Out

Shift Register B Out

Output

Addn

Pipeline

CLK (CLK0,CLK1,CLK2,CLK3)

CE (CE0,CE1,CE2,CE3)

RST(RST0,RST1,RST2,RST3)

Input

Pipeline

Input

Pipeline

Input Data

To Add/Sub

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