4518 datasheet(152/160 Pages) RENESAS

152 / 160 page

Rev.3.01

2005.06.15

page 152 of 157

REJ03B0008-0301

4518 Group

A/D CONVERTER RECOMMENDED OPERATING CONDITIONS

(Comparator mode included, Ta = –20 °C to 85 °C, unless otherwise noted)

Symbol

VDD

VIA

f(ADCK)

Parameter

Supply voltage

Analog input voltage

A/D conversion clock

frequency

(Note)

Conditions

Unit

kHz

Mask ROM version

One Time PROM version

Mask ROM version

One Time PROM version

Min.

2.0

3.0

0.8

Typ.

Max.

5.5

VDD

334

245

3.9

1.8

334

123

Limits

VDD = 4.0 to 5.5 V

VDD = 2.7 to 5.5 V

VDD = 2.2 to 5.5 V

VDD = 2.0 to 5.5 V

VDD = 4.0 to 5.5 V

VDD = 3.0 to 5.5 V

Note: Definition of A/D conversion clock (ADCK)

Instruction clock (INSTCK)

On-chip oscillator clock(RING)

A/D conversion clock (ADCK)

Division circuit

System clock (STCK)

Instruction clock

(INSTCK)

Multi-

plexer

(CMCK,

CRCK,

CYCK)

MR0

MR3, MR2

On-chip oscillator

XIN

Ceramic resonance

RC oscillation

Internal clock

generating circuit

(divided by 3)

Quartz-crystal

oscillation

On-chip oscillator clock (RING)

Q31, Q30

Q32

Divided by 2

Divided by 4

Divided by 8

Division circuit

Divided by 12

Divided by 24

Divided by 48

Divided by 6

334

245

(123)

2.2

( ): One Time PROM version

2.7

(3.0)

5.5

VDD[V]

3.9

1.8

0.8

f(ADCK)

[kHz]

Recommended

operating operation

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