SH7136 datasheet(103/1160 Pages) RENESAS

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Section 5 Exception Handling

Rev. 2.00 Sep. 10, 2008 Page 77 of 1130

REJ09B0402-0200

5.1.3

Exception Handling Vector Table

Before exception handling starts, the exception handling vector table must be set in memory. The

exception handling vector table stores the start addresses of exception handling routines. (The

reset exception handling table holds the initial values of PC and SP.)

All exception sources are given different vector numbers and vector table address offsets. The

vector table addresses are calculated from these vector numbers and vector table address offsets.

During exception handling, the start addresses of the exception handling routines are fetched from

the exception handling vector table that is indicated by this vector table address.

Table 5.3 shows the vector numbers and vector table address offsets. Table 5.4 shows how vector

table addresses are calculated.

Table 5.3

Vector Numbers and Vector Table Address Offsets

Exception Handling Source

Vector Number

Vector Table Address Offset

Power-on reset

H'00000000 to H'00000003

H'00000004 to H'00000007

Manual reset

H'00000008 to H'0000000B

H'0000000C to H'0000000F

General illegal instruction

H'00000010 to H'00000013

(Reserved for system use)

H'00000014 to H'00000017

Illegal slot instruction

H'00000018 to H'0000001B

(Reserved for system use)

H'0000001C to H'0000001F

H'00000020 to H'00000023

CPU address error

H'00000024 to H'00000027

DTC address error

H'00000028 to H'0000002B

Interrupt

NMI

H'0000002C to H'0000002F

User break

H'00000030 to H'00000033

(Reserved for system use)

H'00000034 to H'00000037

H'0000007C to H'0000007F

Trap instruction (user vector)

H'00000080 to H'00000083

H'000000FC to H'000000FF

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