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SH7136 Datasheet(PDF) 105 Page - Renesas Technology Corp |
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SH7136 Datasheet(HTML) 105 Page - Renesas Technology Corp |
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105 / 1160 page ![]() Section 5 Exception Handling Rev. 2.00 Sep. 10, 2008 Page 79 of 1130 REJ09B0402-0200 5.2 Resets 5.2.1 Types of Resets Resets have priority over any exception source. There are two types of resets: power-on resets and manual resets. As table 5.5 shows, both types of resets initialize the internal status of the CPU. In power-on resets, all registers of the on-chip peripheral modules are initialized; in manual resets, they are not. Table 5.5 Reset Status Conditions for Transition to Reset State Internal State Type RES WDT Overflow MRES CPU, INTC On-Chip Peripheral Module POE, PFC, I/O Port Low Initialized Initialized Initialized Power-on reset High Overflow High Initialized Initialized Initialized Manual reset High Not overflowed Low Initialized Not initialized Not initialized 5.2.2 Power-On Reset Power-On Reset by RES Pin: When the RES pin is driven low, this LSI enters the power-on reset state. To reliably reset this LSI, the RES pin should be kept low for at least the oscillation settling time when applying the power or when in standby mode (when the clock is halted) or at least 20 tcyc when the clock is operating. During the power-on reset state, CPU internal states and all registers of on-chip peripheral modules are initialized. See appendix A, Pin States, for the status of individual pins during power-on reset mode. In the power-on reset state, power-on reset exception handling starts when driving the RES pin high after driving the pin low for the given time. The CPU operates as follows: 1. The initial value (execution start address) of the program counter (PC) is fetched from the exception handling vector table. 2. The initial value of the stack pointer (SP) is fetched from the exception handling vector table. 3. The vector base register (VBR) is cleared to H'00000000 and the interrupt mask bits (I3 to I0) of the status register (SR) are set to H'F (B'1111). 4. The values fetched from the exception handling vector table are set in PC and SP, then the program starts. |
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