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SH7136 Datasheet(PDF) 156 Page - Renesas Technology Corp

Part # SH7136
Description  32-Bit RISC Microcomputer SuperH??RISC engine Family
PDF  1160 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7136 Datasheet(HTML) 156 Page - Renesas Technology Corp

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Section 7 User Break Controller (UBC)
Rev. 2.00 Sep. 10, 2008 Page 130 of 1130
REJ09B0402-0200
7.3.6
Break Address Register B (BARB)
BARB is a 32-bit readable/writable register. BARB specifies the address used as a break condition
in channel B. Control bits CDB1 and CDB0 in BBRB select one of the two address buses for
break condition B.
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BAB31 BAB30 BAB29 BAB28 BAB27 BAB26 BAB25 BAB24 BAB23 BAB22 BAB21 BAB20 BAB19 BAB18 BAB17 BAB16
BAB15 BAB14 BAB13 BAB12 BAB11 BAB10
BAB9
BAB8
BAB7
BAB6
BAB5
BAB4
BAB3
BAB2
BAB1
BAB0
Bit
Bit Name
Initial
Value
R/W
Description
31 to 0
BAB31 to
BAB 0
All 0
R/W
Break Address B
Stores an address which specifies a break condition in
channel B.
If the I bus or L bus is selected in BBRB, an IAB or LAB
address is set in BAB31 to BAB0.



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