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SH7136 Datasheet(PDF) 158 Page - Renesas Technology Corp

Part # SH7136
Description  32-Bit RISC Microcomputer SuperH??RISC engine Family
PDF  1160 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7136 Datasheet(HTML) 158 Page - Renesas Technology Corp

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Section 7 User Break Controller (UBC)
Rev. 2.00 Sep. 10, 2008 Page 132 of 1130
REJ09B0402-0200
7.3.8
Break Data Register B (BDRB)
BDRB is a 32-bit readable/writable register. The control bits CDB1 and CDB0 in BBRB select
one of the two data buses for break condition B.
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BDB31 BDB30 BDB29 BDB28 BDB27 BDB26 BDB25 BDB24 BDB23 BDB22 BDB21 BDB20 BDB19 BDB18 BDB17 BDB16
BDB15 BDB14 BDB13 BDB12 BDB11 BDB10
BDB9
BDB8
BDB7
BDB6
BDB5
BDB4
BDB3
BDB2
BDB1
BDB0
Bit
Bit Name
Initial
Value
R/W
Description
31 to 0
BDB31 to
BDB0
All 0
R/W
Break Data Bit B
Stores data which specifies a break condition in channel
B.
If the I bus is selected in BBRB, the break data on IDB is
set in BDB31 to BDB0.
If the L bus is selected in BBRB, the break data on LDB
is set in BDB31 to BDB0.
Notes: 1. Specify an operand size when including the value of the data bus in the break
condition.
2. When the byte size is selected as a break condition, the same byte data must be set in
bits 15 to 8 and 7 to 0 in BDRB as the break data.



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