HD64F36034 datasheet(119/592 Pages) RENESAS

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Section 6 Power-Down Modes

Rev. 4.00 Mar. 15, 2006 Page 87 of 556

REJ09B0026-0400

6.4.2

Direct Transition from Subactive Mode to Active Mode

The time from the start of SLEEP instruction execution to the end of interrupt exception handling

(the direct transition time) is calculated by equation (2).

Direct transition time = {(number of SLEEP instruction execution states) + (number of internal

processing states)}

× (tsubcyc before transition) + {(waiting time set in bits STS2 to STS0) +

(number of interrupt exception handling states)}

× (tcyc after transition)

(2)

Example:

Direct transition time = (2 + 1)

× 8tw + (8192 + 14) × tosc = 24tw + 8206tosc

(when the CPU operating clock of

w/8 → φosc and a waiting time of 8192 states are selected)

[Legend]

tosc: OSC clock cycle time

tw: Watch clock cycle time

tcyc: System clock (

φ) cycle time

tsubcyc: Subclock (

SUB) cycle time

6.5

Module Standby Function

The module-standby function can be set to any peripheral module. In module standby mode, the

clock supply to modules stops to enter the power-down mode. Module standby mode enables each

on-chip peripheral module to enter the standby state by setting a bit in TCMR, SSCRL, or

MSTCR1 that corresponds to each module to 1 and cancels the standby state by clearing the bit to

HD64F36034 Datasheet(PDF) 119 Page - Renesas Technology Corp