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HD64F36022 Datasheet(PDF) 67 Page - Renesas Technology Corp |
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HD64F36022 Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 384 page ![]() Section 2 CPU Rev. 4.00 Sep. 23, 2005 Page 41 of 354 REJ09B0025-0400 As a result of the BSET instruction, bit 0 in PDR5 becomes 1, and P50 outputs a high-level signal. However, bits 7 and 6 of PDR5 end up with different values. To prevent this problem, store a copy of the PDR5 data in a work area in memory. Perform the bit manipulation on the data in the work area, then write this data to PDR5. • Prior to executing BSET MOV.B #80, R0L MOV.B R0L, @RAM0 MOV.B R0L, @PDR5 The PDR5 value (H'80) is written to a work area in memory (RAM0) as well as to PDR5. P57 P56 P55 P54 P53 P52 P51 P50 Input/output Input Input Output Output Output Output Output Output Pin state Low level High level Low level Low level Low level Low level Low level Low level PCR5 0 0 1 1 1 1 1 1 PDR5 1 0 0 0 0 0 0 0 RAM0 1 0 0 0 0 0 0 0 • BSET instruction executed BSET #0, @RAM0 The BSET instruction is executed designating the PDR5 work area (RAM0). • After executing BSET MOV.B @RAM0, R0L MOV.B R0L, @PDR5 The work area (RAM0) value is written to PDR5. P57 P56 P55 P54 P53 P52 P51 P50 Input/output Input Input Output Output Output Output Output Output Pin state Low level High level Low level Low level Low level Low level Low level High level PCR5 0 0 1 1 1 1 1 1 PDR5 1 0 0 0 0 0 0 1 RAM0 1 0 0 0 0 0 0 1 |
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