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HD64F36022 Datasheet(PDF) 27 Page - Renesas Technology Corp |
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HD64F36022 Datasheet(HTML) 27 Page - Renesas Technology Corp |
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27 / 384 page ![]() Section 1 Overview Rev. 4.00 Sep. 23, 2005 Page 1 of 354 REJ09B0025-0400 Section 1 Overview 1.1 Features • High-speed H8/300H central processing unit with an internal 16-bit architecture Upward-compatible with H8/300 CPU on an object level Sixteen 16-bit general registers 62 basic instructions • Various peripheral functions Timer V (8-bit timer) Timer W (16-bit timer) Watchdog timer SCI3 (Asynchronous or clocked synchronous serial communication interface) 10-bit A/D converter • On-chip memory Model Product Classification Standard Version On-Chip Power- On Reset and Low-Voltage Detecting Circuit Version ROM RAM H8/36024F HD64F36024 HD64F36024G 32 kbytes 2,048 bytes H8/36022F HD64F36022 HD64F36022G 16 kbytes 2,048 bytes H8/36014F HD64F36014 HD64F36014G 32 kbytes 2,048 bytes Flash memory version (F-ZTAT TM version) H8/36012F HD64F36012 HD64F36012G 16 kbytes 2,048 bytes H8/36024 HD64336024 HD64336024G 32 kbytes 1,024 bytes H8/36023 HD64336023 HD64336023G 24 kbytes 1,024 bytes H8/36022 HD64336022 HD64336022G 16 kbytes 512 bytes H8/36014 HD64336014 HD64336014G 32 kbytes 1,024 bytes H8/36013 HD64336013 HD64336013G 24 kbytes 1,024 bytes H8/36012 HD64336012 HD64336012G 16 kbytes 512 bytes H8/36011 HD64336011 HD64336011G 12 kbytes 512 bytes Masked ROM version H8/36010 HD64336010 HD64336010G 8 kbytes 512 bytes |
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