32186 datasheet(502/1032 Pages) RENESAS

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A/D CONVERTER

11-4

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

11.1 Outline of A/D Converter

Table 11.1.1 Outline of the A/D Converter (2/2)

Item

Description

Conversion mode

A/D Conversion, comparator mode

Operation mode

Single mode, Scan one shot mode, Scan continuous mode

Conversion start trigger

Software start

Started by setting the A/D conversion start bit to "1"

Hardware start

A/D0 Converter MJT (input event bus 2), MJT (input event bus 3),

MJT (output event bus 3) and MJT (TIN23)

Conversion

During single mode

Slow mode

Normal speed

299 x BCLK

14.95µs

speed

(When sample-and-hold disabled/

Double speed

173 x BCLK

8.65µs

(Note 1)

When normal sample-and-hold enabled)

Fast mode

Normal speed

131 x BCLK

6.55µs

(Note 2)

Double speed

89 x BCLK

4.45µs

(Note 3)

During single mode

Slow mode

Normal speed

191 x BCLK

9.55µs

(When fast sample-and-hold enabled)

Double speed

101 x BCLK

5.05µs

Fast mode

Normal speed

95 x BCLK

4.75µs

Double speed

53 x BCLK

2.65µs

During comparator mode

Slow mode

Normal speed

47 x BCLK

2.35µs

Double speed

29 x BCLK

1.45µs

Fast mode

Normal speed

23 x BCLK

1.15µs

Double speed

17 x BCLK

0.85µs

Sample-and-hold function

Sample-and-hold function can be enabled or disabled as necessary.

Simultaneous

When Sample-and-hold function is effective, 2 channel simultaneous sampling function can be

sampling function

selected.

A/D disconnection

Influences of the analog input voltage leakage from any preceding channel during scan detection

assist function

mode operation are suppressed.

Interrupt request

Generated when A/D conversion (single mode operation, single-shot scan operation or one cycle of

generation function

continuous operation) or comparate operation is completed.

DMA transfer request

Generated when A/D conversion (single mode operation, single-shot scan operation or one cycle of

generation function

continuous operation) or comparate operation is completed.

Note 1: Condition for standard value : f(XIN)=10MHz, AVCCE=VCCER=VCCBUS=VDDE=AVCC0=5.12V, Ta=-40°C to

+125°C, BCLK mode.

Note 2: The conversion accuracy stipulated here refers to that of the microcomputer alone, with influences of the power

supply wiring and noise on the board not taken into account.

Note 3: Conversion time during 2BCLK mode is refer to Table 11.3.6 A/D Conversion Time (Total Time).

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