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32186 Datasheet(PDF) 588 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 588 Page - Renesas Technology Corp |
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588 / 1032 page  SERIAL INTERFACE 12 12-40 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Figure 12.4.2 Receive Operation during CSIO Mode (Hardware Processing) Receive data Set the SIO Receive Control Register reception finished bit to "1" Store the received data in the receive buffer register Set the SIO Receive Control Register overrun error and receive error sum bits to "1" Receive conditions met? Overrun error ? Yes Yes No No End of CSIO receive operation CSIO receive operation starts 12.4.4 About Successive Reception If the following conditions are met when data reception has finished, data may be received successively. • The receive enable bit is set to "1." • Transmit conditions are met. • No overrun error has occurred. 12.4 Receive Operation in CSIO Mode |
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