32186 datasheet(591/1032 Pages) RENESAS

591 / 1032 page

SERIAL INTERFACE

12-43

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Figure 12.4.4 Example of CSIO Reception (When Overrun Error Occurred)

External clock selected

Internal clock selected

SCLKO

RXD

SCLKI

TXD

: Processing by software

: Interrupt request generated

Receive clock

(SCLKI)

Set

Receive enable bit

RXD

Note 1: Changes of the Interrupt Controller's SIO Receive Interrupt Control Register interrupt request bit

Note 2: When reception finished interrupt is enabled

Note 3: When receive error interrupt is enabled

Note 4: The receive enable bit is cleared

Note 5: The Interrupt Controller's IVECT register is read or the SIO Receive Interrupt Control Register interrupt

request bit cleared

First data reception

completed

Next data reception

completed

Reception finished bit

SIO receive interrupt request

(Note 1)

(When reception finished

interrupt is selected)

Receive buffer not read

out during this interval

Set

Overrun error bit cleared

(Note 4)

Reception finished

interrupt request

(Note 2)

Interrupt request accepted (Note 5)

Cleared

Receive error interrupt request

(Note 3)

Interrupt request accepted (Note 5)

(When receive error

interrupt is selected)

Overrun error bit

12.4 Receive Operation in CSIO Mode

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