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32186 Datasheet(PDF) 638 Page - Renesas Technology Corp

Part # 32186
Description  MCU
PDF  1032 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32186 Datasheet(HTML) 638 Page - Renesas Technology Corp

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13
CAN MODULE
13-28
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
• Procedure for entering BasicCAN mode
Follow the procedure below during initialization:
1) Set the ID for slots 30 and 31 and the local mask registers A and B. (We recommend setting the
same value.)
2) Set the frame types to be handled by slots 30 and 31 (standard or extended) in the CAN Frame
format select Register. (We recommend setting the same type.)
3) Set the Message Slot Control Registers for slots 30 and 31 for data frame reception.
4) Set the BCM bit to "1."
Notes: • Do not change settings of the BCM bit while CAN is operating (CAN Status Register CRS
bit = "0").
• The first slot that is active after clearing the RST bit is slot 30.
• Even during BasicCAN mode, slots 0 to 29 can be used the same way as in normal
operation.
(6) LBM (Loopback Mode) bit (Bit 14)
When the LBM bit is set to "1," if a receive slot exists whose ID matches that of the frame sent by the CAN
module itself, then the frame can be received.
Notes: • ACK is not returned for the frame sent by itself.
• Do not change settings of the LBM bit while CAN is operating (CAN Status Register CRS
bit = "0").
• After complete sending Frame correctly, TSC bit in CAN status register(CANnSTAT) is
"1," but RSC bit is not "1." And it is possible to symbiotic for transmit complete interrupt
request and recieve complete interrupt request.
(7) RST (CAN Reset) bit (Bit 15)
When the RST bit is cleared to "0," the CAN module is connected to the CAN bus and becomes ready to
communicate after detecting 11 consecutive recessive bits. Also, the CAN Timestamp Count Register
thereby starts counting. When the RST bit is set to "1," the bus enters an idle state after sending frames from
the slots which have transmit requests set by that time. Then, the protocol control unit enters a reset state
and the CAN module is disconnected from the CAN bus. Frames received during this time are processed
normally.
When setting RST bit to "1" under bus off state, it exits from bus off state after detecting 11 consecutive
recessive bits on CAN bus 128 times, and then protocol control unit enters a reset state.
Notes: • It is inhibited to set a new transmit request until the protocol control unit is reset (until the
CAN Status Register CRS bit is set to "1") after setting the RST bit to "1."
• When the protocol control unit is reset by setting the RST bit to "1," the CAN Timestamp
Count and CAN Transmit/Receive Error Count Registers are initialized to "0."
• In order for CAN communication to start, the FRST and RST bits must be cleared to "0."
13.2 CAN Module Related Registers



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