32186 datasheet(797/1032 Pages) RENESAS

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REAL TIME DEBUGGER (RTD)

15-11

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

(8 bits)

Check that the RTDACK signal is "L."

RTDCLK

RTDRXD

RTDTXD

RTDACK

Transfer of one frame (32 bits)

Transfer of the

next frame

(8 bits)

Figure 15.5.2 Example of Communication with the Host (when Using VER Command)

15.5 Typical Connection with Host

The host uses a serial synchronous interface to transfer data. The clock for synchronous communication

should be generated by the host. An example for connecting the RTD and host is shown below.

Figure 15.5.1 Connecting the RTD and Host

The RTD communication is performed in a fixed length of 32 bits per frame. Because serial interfaces gener-

ally handle data in 8-bit units, data is transferred separately in four operations, 8 bits at a time. The RTDACK

signal is used to verify that communication is performed normally.

The RTDACK signal goes 0 “L” after a command is sent, providing a means of verifying the communication

status. When issuing the VER command, the RTDACK signal is pulled “L” for only one clock period. There-

fore, after sending 32 bits in one frame via a serial interface, turn off RTDCLK output and check that

RTDACK is “L.” That way, it is possible to know whether the RTD is communicating normally.

If it is desirable to identify the type of transmitted command by the width of RTDACK, use the microcomputer’s

internal measurement timer (to count RTDCLK pulses while RTDACK is “L”), or design a dedicated circuit.

RTDRXD

RTDTXD

RTDCLK

RTDACK

M32R/ECU

Host

microprocessor

RXD

TXD

SCLK

PORT

(Note 1)

Note 1: This applies to the case where the RTDACK level is checked between transfer frames.

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