32186 datasheet(800/1032 Pages) RENESAS

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NON-BREAK DEBUG (NBD)

16-2

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

16.1 Outline of Non-Break Debug (NBD)

Non-Break Debug (NBD) has the RAM monitor and event output functions. A dedicated DMA is incorporated

in NBD, so that accesses to the internal RAM, etc. are accomplished using this DMA.

(1) RAM monitor function

This function is provided for reading and writing to and from all resources connected to the internal/

external buses mapped in the address space. It allows the RAM data, etc. to be referenced and

altered. Furthermore, accesses to the address space used exclusively for NBD (i.e., NBD space) are

accomplished using this function.

(2) Event output function

Upon detecting access to a preset address, this function outputs "L" level signal from the NBDEVNT#

pin. A specific address and read/write access can be specified as the event occurrence condition.

Table 16.1.1 Outline of the Non-Break Debug (NBD)

Item

Content

Transfer method

Clock-synchronous parallel interface (4 bits)

Transfer clock generation

Generated by external host

Access area

All areas in the address map and NBD space

Access size

8, 16 or 32 bits (for NBD space, fixed to 8 bits)

Maximum transfer rate

12.5MHz

Input/output pins

7 pins (NBDD3–NBDD0, NBDCLK, NBDSYNC#, NBDEVNT#)

Functions

• RAM monitor function (Note 1)

• Event output function

Number of events set

1 event

Note 1: Accessible to all resources connected to the internal/external buses as well as RAM.

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