32186 datasheet(838/1032 Pages) RENESAS

838 / 1032 page

EXTERNAL BUS INTERFACE

17-28

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

17.5 Typical Connection of External Extension Memory

(2) When the Bus Mode Control Register = "1"

A typical memory connection when using external extension memory is shown in Figure 17.5.2. (External

extension memory can only be used in external extension mode and processor mode.)

Figure 17.5.2 Typical Connection of External Extension Memory (when BUSMOD bit = "1")

Notes: • Address pin 0 is the MSB, and pin 31 is the LSB. (Pins 9-30 are output).

• Data pin 0 is the MSB, and pin 15 is the LSB.

• If external extension memory is connected to the system, the MSB and the LSB sides (endian

format) should be taken into consideration when connecting each pin.

SRAM

M32185F4

M32186F8

Memory mapping

Internal ROM area

(1MB)

A30

DB0

DB15

RD#

CS0#

CS1#

CS2#

CS3#

BLE#

BHE#

Number of bus wait states can be set to 0-15

WAIT#

Normally used as port. WAIT is used only when more than 15 wait states are needed.

H'0000 0000

H'017F FFFF

H'0100 0000

H'000F FFFF

H'0010 0000

External memory area

(8MB)

7M-CS0 area

8M-CS1 area

Flash memory

A21

D15

RD#

CS#

max7MB

A21

D15

RD#

CS#

BHE#(D15-D8)

BLE#(D7-D0)

max8MB

WR#

External memory area

(7MB)

H'007F FFFF

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