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32186 Datasheet(PDF) 936 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 936 Page - Renesas Technology Corp |
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936 / 1032 page ![]() 23 ELECTRICAL CHARACTERISTICS 23-20 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 23.9 A.C. Characteristics (when VCCE = 5 V) • The timing conditions are referenced to VCCE, VCCER, VCC-BUS, VDDE = 5 V ± 0.5 V, Ta = –40°C to 125°C unless otherwise noted. • The rated values below are guaranteed for the case where the output load capacitance of the measured pins are 15 pF to 50 pF (guaranteed value during centralizedcapacitance for JTAG related values is 80 pF and for NBD related is 100 pF). • The terms W, C, S, R and ID in the rated values shown below have the following meaning. For details about CS Area Wait Control Regiser, see Section 18.2.1, "CS Area Wait Control Registers." W: Number of wait states (selected by the CS Area Wait Control Register WAIT bit) C: "1" when the CS Area Wait Control Register CWAIT bit = 1, or "0" when CWAIT bit = 0 S: "1" when the CS Area Wait Control Register SWAIT bit = 1, or "0" when SWAIT bit = 0 R: "1" when the CS Area Wait Control Register RECOV bit = 1, or "0" when RECOV bit = 0 ID: Number of idle cycles inserted at the end of the bus cycle. Idle cycles may be inserted as specified by the CS Area Wait Control Register IDLE bit, or inserted by default when a write operation is executed immediately after a read (ID = 0 or 1). • Characteristics of synchronous timing to the external bus clock are values only relative to CLKOUT (none relative to BCLK). • The CLKOUT/WR# functions are assigned to two separate pins, P70/CLKOUT/WR#/BCLK pins (Pin No.78) and P150/TIN0/CLKOUT/WR# pins (Pin No.133). Unless otherwise noted, characteristics for CLKOUT pin/WR# pin are values of Pin No.133. • The output drive capability is a value under the following conditions. For output drive capability setting, see Section 8.5, "Port Output Drive Capability Setting Function." • CLKOUT pin/WR# pin (Pin No.133): high drive power selected • The rest of the output pins: low drive power (the value upon exiting reset) selected (1) Output Switching Characteristics Measurement Circuit 23.9 A.C. Characteristics (when VCCE = 5 V) Measured pin CMOS output CL : JTDO pin = 80pF : NBDD0 −NBDD3 (output), NBDEVNT# = 100pF : Other than those above = 15 −50pF Figure 23.9.1 Output Switching Characteristics Measurement Circuit (2) Input and Output Transition Time Symbol Parameter Rated Value Unit See Fig MIN MAX 23.9.2 tr High-going NBDCLK, NBDD0-NBDD3 pins (input), 8ns [115] (INPUT) TransitionTime of NBDSYNC# pin Input JTCK, JTDI, JTMS 10 ns JTRST pin 2 ms tf Low-ging NBDCLK, NBDD0-NBDD3 pins (input), 8ns [116] (INPUT) Transition Time of NBDSYNC# pin Input JTCK, JTDI, JTMS 10 ns JTRST pin 2 ms |
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