32186 datasheet(112/1032 Pages) RENESAS

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EIT

4-10

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

4.7 EIT Vector Entry

The EIT vector entry is located in the user space beginning with the address H’0000 0000. The table

below lists the EIT vector entry and the status of SM, IE and BPC bits after each EIT events occured.

Table 4.7.1 EIT Vector Entry

Name

Abbreviation Vector Address

BPC

Reset Interrupt

H'0000 0000 (Note 1) 0

Undefined

System Break

SBI

H'0000 0010

PC of the next instruction

Interrupt

Reserved Instruction

RIE

H'0000 0020

Unchanged

PC of the instruction that generated RIE

Exception

Address Exception

H'0000 0030

Unchanged

PC of the instruction that generated AE

Trap

TRAP0

H'0000 0040

Unchanged

PC of TRAP instruction + 4

TRAP1

H'0000 0044

Unchanged

PC of TRAP instruction + 4

TRAP2

H'0000 0048

Unchanged

PC of TRAP instruction + 4

TRAP3

H'0000 004C

Unchanged

PC of TRAP instruction + 4

TRAP4

H'0000 0050

Unchanged

PC of TRAP instruction + 4

TRAP5

H'0000 0054

Unchanged

PC of TRAP instruction + 4

TRAP6

H'0000 0058

Unchanged

PC of TRAP instruction + 4

TRAP7

H'0000 005C

Unchanged

PC of TRAP instruction + 4

TRAP8

H'0000 0060

Unchanged

PC of TRAP instruction + 4

TRAP9

H'0000 0064

Unchanged

PC of TRAP instruction + 4

TRAP10

H'0000 0068

Unchanged

PC of TRAP instruction + 4

TRAP11

H'0000 006C

Unchanged

PC of TRAP instruction + 4

TRAP12

H'0000 0070

Unchanged

PC of TRAP instruction + 4

TRAP13

H'0000 0074

Unchanged

PC of TRAP instruction + 4

TRAP14

H'0000 0078

Unchanged

PC of TRAP instruction + 4

TRAP15

H'0000 007C

Unchanged

PC of TRAP instruction + 4

External Interrupt

H'0000 0080 (Note 2) 0

PC of the next instruction

Floating-Point Exception

FPE

H'0000 0090

Unchanged

PC of the instruction that generated FPE + 4

Note 1: During boot mode, the CPU starts executing the boot program after exiting the reset state. For details, see Section

6.6, “Programming the Internal Flash Memory.”

Note 2: During flash E/W enable mode, this vector address is moved to the beginning of the internal RAM

(address H’0080 4000). For details, see Section 6.6, “Programming the Internal Flash Memory.”

4.7 EIT Vector Entry

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