32186 datasheet(113/1032 Pages) RENESAS

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EIT

4-11

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

4.8 Exception Processing

4.8.1 Reserved Instruction Exception (RIE)

[Occurrence Conditions]

Reserved Instruction Exception (RIE) occurs when a reserved instruction (unimplemented instruc-

tion) is detected. Instruction check is performed on the op-code part of the instruction.

When a reserved instruction exception occurs, the instruction that generated it is not executed. If an

external interrupt is requested at the same time a reserved instruction exception is detected, it is the

reserved instruction exception that is accepted.

[EIT Processing]

(1) Saving SM, IE and C bits

The PSW register’s SM, IE and C bits are saved to the respective backup bits: BSM, BIE and BC.

BSM

←

BIE

←

(2) Updating SM, IE and C bits

The PSW register’s SM, IE and C bits are updated as shown below.

←

Unchanged

←

(3) Saving the PC

The PC value of the instruction that generated the reserved instruction exception is set in the BPC regis-

ter. For example, if the instruction that generated the reserved instruction exception is at address 4, the

value 4 is set in the BPC register. Similarly, if the instruction that generated the reserved instruction

exception is at address 6, the value 6 is set in the BPC register. In this case, the value of the BPC register

bit 30 indicates whether the instruction that generated the reserved instruction exception resides on a

word boundary (BPC register bit 30 = "0") or not on a word boundary (BPC register bit 30 = "1").

However, in either case of the above, the address to which the RTE instruction returns after the EIT

handler has terminated is address 4. (This is because the 2 low-order address bits are cleared to ‘00’

when returned to the PC.)

Figure 4.8.1 Example of a Return Address for Reserved Instruction Exception (RIE)

H'00

Address

RIE occurred

H'04

H'08

H'0C

H'00

Address

RIE occurred

H'04

H'08

H'0C

Return

address

BPC

H'06

BPC

H'04

Return

address

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