32186 datasheet(116/1032 Pages) RENESAS

116 / 1032 page

EIT

4-14

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

(3) Saving the PC

The PC value of the instruction that generated the FPE + 4 is set in the BPC register.

Because all of the instructions that generate an FPE are 32 bits long, the address to which the RTE

instruction returns is always the instruction next to the one that generated the FPE.

(4) Branching to the EIT vector entry

The CPU branches to the address H’0000 0090 in the user space. This is the last operation performed

in hardware preprocessing.

(5) Jumping from the EIT vector entry to the user-created handler

The CPU executes the BRA instruction written by the user at the address H’0000 0090 of the EIT

vector entry to jump to the start address of the user-created handler. At the beginning of the user-

created EIT handler, first save the BPC, PSW and FPSR registers and the necessary general-pur-

pose registers to the stack.

(6) Returning from the EIT handler

At the end of the EIT handler, restore the saved registers from the stack and execute the RTE instruc-

tion. When the RTE instruction is executed, hardware postprocessing is automatically performed.

4.8 Exception Processing

32186 Datasheet(PDF) 116 Page - Renesas Technology Corp