32186 datasheet(202/1032 Pages) RENESAS

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RESET

7-4

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

7.3 Internal State upon Exiting Reset

The table below lists the internal state of the microcomputer when it has gotten out of a reset state. For

details about the initial register state of each internal peripheral I/O, see each section in this manual in which

the relevant internal peripheral I/O is described.

Table 7.3.1 Internal State upon Exiting Reset

State upon exiting reset

PSW

(CR0)

B'0000 0000 0000 0000 ??00 000? 0000 0000

(BSM, BIE, BC bits = undefined)

CBR

(CR1)

H'0000 0000

(C bits = 0)

SPI

(CR2)

Undefined

SPU

(CR3)

Undefined

BPC

(CR6)

Undefined

FPSR

(CR7)

H'0000 0100 (only DN bit = 1)

H'0000 0000

(Executed beginning with the address H’0000 0000) (Note 1)

R0–R15

Undefined

ACC (accumulator)

Undefined

RAM

Undefined when reset at power-on. (However, if the RAM is gotten out of reset after

returning from backup mode, it retains the content it had before being reset.)

Note 1: When in boot mode, the CPU executes the boot program.

7.4 Things to Be Considered upon Exiting Reset

• Input/output ports

When exiting reset, the microcomputer’s input/output ports are disabled against input in order to prevent shoot-

through current. To use any ports in input mode, set the Port Input Special Function Control Register (PICNT)

PIEN0 bit to enable them for input. For details, see Section 8.3, “Input/Output Port Related Registers.”

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