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HD64F7047 Datasheet(PDF) 104 Page - Renesas Technology Corp

Part # HD64F7047
Description  Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series
PDF  764 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F7047 Datasheet(HTML) 104 Page - Renesas Technology Corp

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Rev. 2.00, 09/04, page 64 of 720
5.3.2
Address Error Exception Processing
When an address error occurs, the bus cycle in which the address error occurred ends, the current
instruction finishes, and then address error exception processing starts. The CPU operates as
follows:
1. The status register (SR) is saved to the stack.
2. The program counter (PC) is saved to the stack. The PC value saved is the start address of the
instruction to be executed after the last executed instruction.
3. The start address of the exception service routine is fetched from the exception processing
vector table that corresponds to the occurred address error, and the program starts executing
from that address. The jump in this case is not a delayed branch.



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