HD64F7047 datasheet(291/764 Pages) RENESAS

Part #	HD64F7047

Description	Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

PDF	764 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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291 / 764 page

Rev. 2.00, 09/04, page 251 of 720

External

clock

TCNT input

clock

TCNT

Falling edge

Rising edge

N-1

N+1

Figure 10.56 Count Timing in External Clock Operation (Phase Counting Mode)

Output Compare Output Timing: A compare match signal is generated in the final state in

which TCNT and TGR match (the point at which the count value matched by TCNT is updated).

When a compare match signal is generated, the output value set in TIOR is output at the output

compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match

signal is not generated until the TCNT input clock is generated.

Figure 10.57 shows output compare output timing (normal mode and PWM mode) and Figure

10.58 shows output compare output timing (complementary PWM mode and reset synchronous

PWM mode).

TGR

TCNT

TCNT input

clock

N+1

Compare

match signal

TIOC pin

Figure 10.57 Output Compare Output Timing (Normal Mode/PWM Mode)

HD64F7047 Datasheet(PDF) 291 Page - Renesas Technology Corp