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3822 Datasheet(PDF) 104 Page - Renesas Technology Corp |
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3822 Datasheet(HTML) 104 Page - Renesas Technology Corp |
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104 / 328 page ![]() APPLICATION 2.3 Timer X and timer Y 3822 GROUP USER’S MANUAL 2–38 (4) Pulse width measurement mode In the pulse width measurement mode, the width (“H” or “L” level) of a pulse input from the P54/CNTR0 pin is measured. Operation in the pulse width measurement mode is described below. Count operation Immediately after reset, the timer X stop control bit is in the “0” state. In this state, a count operation is continued in the period in which the measurement level is input to the P54/CNTR0 pin. The value of the X counter is decremented by 1 each time a count source is input. The count source is f(XIN)/16 clock (low-speed mode ; f(XCIN)/16 clock). Reload operation The X counter underflows at the first count pulse after the value of the X counter reaches “0016.” At this time, the value of the X latch is transferred (reloaded) to the X counter. Pulse width measurement As a pulse measurement period, a “H” or “L” is selected by the CNTR0 active edge switch bit. The difference between the initial value of the X counter and the X counter value at counter stop is a measured pulse width. A reload operation by reading the count value is not performed automatically. Accordingly, to continue the measurement, set the initial value anew by software. Interrupt operation sEdge of pulse measured At the edge of the pulse input from the P54/CNTR0 pin, an interrupt request occurs. At the same time, the CNTR0 interrupt request bit is set to “1.” The occurrence of an interrupt is controlled by the CNTR0 interrupt enable bit. The CNTR0 active edge switch bit specifies an active edge. When “H” level width is measured, the falling edge ( ) is active, when “L” level width is measured, the rising edge ( ) is active. sCounter underflow An interrupt request occurs at the X counter underflow. At the same time, the timer X interrupt request bit is set to “1.” The occurrence of an interrupt is controlled by using the timer X interrupt enable bit. Figure 2.3.4 shows a pulse width measurement mode operation example. |
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