7906 datasheet(345/531 Pages) RENESAS

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STOP AND WAIT MODES

7906 Group User’s Manual Rev.2.0

15-4

15.2 Block description

15.2.1 Particular function select register 0

Figure 15.2.2 shows the structure of the particular function select register 0, and Figure 15.2.3 shows the

writing procedure for the particular function select register 0.

(1) STP instruction invalidity select bit (bit 0)

Setting this bit to “1” invalidates the STP instruction. When using the stop mode, be sure to clear this

bit to “0.”

Writing to this bit requires the following procedure:

• Write “5516” to address 6216.

• Succeedingly, write “0” or “1” to this bit. (See Figure 15.2.3.)

If an interrupt occurs between writing of “5516” and next writing of “0” or “1,” latter writing may be

ignored. When there is a possibility that an interrupt occurs at the above timing, be sure to read this

bit’s contents after writing of “0” or “1,” and verify whether “0” or “1” has correctly been written or not.

(Note)

Bit name

Bit

Particular function select register 0 (Address 6216)

Function

At reset

R/W

STP instruction invalidity select bit

External clcok input select bit

Fix these bits to “000000.”

b7 b6 b5 b4 b3 b2 b1 b0

0 : STP instruction is valid.

1 : STP instruction is invalid.

0 : Oscillation circuit is active. (Oscillator is connected.)

Watchdog timer is used at stop mode termination.

1 : Oscillation circuit is inactive. (External clock is

input.)

When the system clock select bit (bit 5 at address BC16) = “0,”

watchdog timer is not used at stop mode termination.

When the system clock select bit = “1,”

watchdog timer is used at stop mode termination.

Fig. 15.2.2 Structure of particular function select register 0

Note: Writing to these bits requires the following procedure:

• Write “5516” to this register. (The bit status does not change only by this writing.)

• Succeedingly, write “0” or “1” to each bit.

Also, use the MOVMB (MOVM when m = 1) instruction or STAB (STA when m = 1) instruction.

If an interrupt occurs between writing of “5516” and next writing of “0” or “1,” latter writing may be ignored. When there is a

possibility that an interrupt occurs at the above timing, be sure to read this bit’s contents after writing of “0” or “1,” and verify

whether “0” or “1” has correctly been written or not.

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