7906 datasheet(124/531 Pages) RENESAS

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TIMER A

7906 Group User’s Manual Rev.2.0

7-21

7.4 Event counter mode

7.4.1 Setting for event counter mode

Figures 7.4.2 and 7.4.3 show an initial setting example for registers related to the event counter mode.

Note that when using interrupts, set up to enable the interrupts. For details, refer to “CHAPTER 6.

INTERRUPTS.”

Fig. 7.4.2 Initial setting example for registers related to event counter mode (1)

✻ The counter divides the count source frequency by (n + 1)

when counting down, or by (FFFF16 – n + 1) when counting up.

Continued to Figure 7.4.3

on the next page

Selecting event counter mode and each function

Timer Aj mode register (j = 0 to 2, 4, 9)

(Addresses 5616 to 5816, 5A16, DA16)

Pulse output function select bit

0: No pulse output

1: Pulse output

Count polarity select bit

0: Counts at falling edge of external signal.

1: Counts at rising edge of external signal.

Up-down switching factor select bit

0: Contents of up-down register

1: Input signal to TAjOUT pin

Selection of event counter mode

Setting divide ratio

Can be set to

“000016” to “FFFF16” (n).

(b15)

(b8)

Timer A0 register (Addresses 4716, 4616)

Timer A1 register (Addresses 4916, 4816)

Timer A2 register (Addresses 4B16, 4A16)

Timer A4 register (Addresses 4F16, 4E16)

Timer A9 register (Addresses CF16, CE16)

X: It may be either “0” or “1.”

✕ ✕

Setting up–down register

Up–down register 0 (Address 4416)

Timer A1 up–down bit

Timer A0 up–down bit

Timer A2 up–down bit

Timer A4 up–down bit

Timer A2 two–phase pulse

signal processing select bit

Timer A4 two–phase pulse

signal processing select bit

Set to the corresponding up–down bit when the

contents of the up-down register are selected as

the up-down switching factor.

0: Countdown

1: Countup

0: Two–phase pulse signal processing

function disabled

1: Two–phase pulse signal processing

function enabled

Set the corresponding bit to “1” when the

two–phase pulse signal processing function

is selected for timers A2 and A4.

Up–down register 1 (Address C416)

Timer A9 up–down bit

Timer A9 two–phase pulse

signal processing select bit

Set to the corresponding up–down bit when the contents

of the up-down register are selected as the up-down

switching factor.

0: Countdown

1: Countup

0: Two–phase pulse signal processing

function disabled

1: Two–phase pulse signal processing

function enabled

Set the corresponding bit to “1” when the

two–phase pulse signal processing function

is selected for timer A9.

000 0

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