7906 datasheet(190/531 Pages) RENESAS

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PULSE OUTPUT PORT MODE

7906 Group User’s Manual Rev.2.0

9-9

9.2 Block description

Fig. 9.2.4 Structure of port P2 pin function control register

9.2.3 Port P2 direction register, Port P7 direction register

Figure 9.2.4 shows the structure of the port P2 pin function control register; Figure 9.2.5 shows the

relationship between the port P2/P7 direction register and pulse output trigger input pins.

The allocation of the pulse output trigger input pin can be changed by the pin INT3/RTPTRG0 select bit.

When using pin P74(P27)/RTPTRG0 as a pulse output trigger input pin, be sure to clear the corresponding

bit of the direction register of the port, which is multiplexed with pin RTPTRG0, in order to set this port pin

for the input mode.

Port P2 pin function control register (Address AE16)

6 to 4

Bit name

Bit

Function

At reset

R/W

Pin TB0IN select bit

Pin TB1IN select bit

Pin TB2IN select bit

Pin INT3/RTPTRG0 select bit

(Note)

Nothing is assigned.

Fix this bit to “0.”

b7 b6 b5 b4 b3 b2 b1 b0

0 : Allocate pin TB2IN to P57.

1 : Allocate pin TB2IN to P26.

0: Allocate pin INT3/RTPTRG0 to P74.

1: Allocate pin INT3/RTPTRG0 to P27.

0 : Allocate pin TB0IN to P55.

1 : Allocate pin TB0IN to P24.

0 : Allocate pin TB1IN to P56.

1 : Allocate pin TB1IN to P25.

Undefined

—

Note: When allocating pin INT3/RTPTRG0 to P74, be sure that the D-A1 output enable bit (bit 1 at address 9616) = “0” (output

disabled).

7906 Datasheet(PDF) 190 Page - Renesas Technology Corp