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7906 Datasheet(PDF) 191 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 191 Page - Renesas Technology Corp |
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191 / 531 page ![]() PULSE OUTPUT PORT MODE 7906 Group User’s Manual Rev.2.0 9-10 9.2 Block description Fig. 9.2.5 Relationship between port P2/P7 direction register and pulse output trigger input pins Corresponding pin Bit 0 1 2 3 4 7 to 5 Port P7 direction register (Address 1116) Function At reset R/W 0 0 0 0 0 Undefined RW RW RW RW RW — b7 b6 b5 b4 b3 b2 b1 b0 Pin AN0 Pin AN1 Pin AN2 Pin AN3/DA0 Pin RTPTRG0 (Pin AN4/DA1/INT3) (Note 1) Nothing is assigned. 0 : Input mode 1 : Output mode When using this pin as a pulse output trigger input pin, be sure to clear the corresponding bit to “0.” Corresponding pin Bit 0 1 2 3 4 5 6 7 Port P2 direction register (Address 816) Functions At reset R/W Pin TA4OUT Pin TA4IN Pin TA9OUT Pin TA9IN Pin TB0IN (Note 1) Pin TB1IN (Note 2) Pin TB2IN (Note 3) Pin RTPTRG0 (Pin INT3) (Note 4) 0 0 0 0 0 0 0 0 RW RW RW RW RW RW RW RW b7 b6 b5 b4 b3 b2 b1 b0 0 : Input mode 1 : Output mode When using this pin as a pulse output trigger input pin, be sure to clear the corresponding bit to “0.” Notes 1: This applies when the pin TB0IN select bit (bit 0 at address AE16) = 1. 2: This applies when the pin TB1IN select bit (bit 1 at address AE16) = 1. 3: This applies when the pin TB2IN select bit (bit 2 at address AE16) = 1. 4: This applies when the pin INT3/RTPTRG0 select bit (bit 3 at address AE16) = 1. 5: ( ) shows the I/O pin of another internal peripheral device which is multiplexed. Notes 1: This applies when the pin INT3/RTPTRG0 select bit (bit 3 at address AE16) = 0. 2: ( ) shows the I/O pin of another internal peripheral device which is multiplexed. |
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