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32172 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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32172 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 875 page ![]() 2 2-8 Rev.1.0 CPU 2.6 Data Formats 2.6.2 Data Formats (1) Data formats in register Data sizes in M32R registers are always words (32 bits). When loading byte (8-bit) or halfword (16-bit) data from memory into a register, the data is sign- extended (LDB, LDH instructions) or zero-extended (LDUB, LDUH instructions) into word (32-bit) data before being stored in the register. When storing data from M32R register into memory, the register data is stored in memory in different sizes depending on the instructions used. The ST instruction stores the entire 32-bit data of the register, the STH instruction stores the least significant 16-bit data, and the STB instruction stores the least significant 8-bit data. Figure 2.6.2 Data Formats in Register Rn 0(MSB) 31(LSB) <When loading> Byte Rn 0(MSB) 31(LSB) Halfword Rn 0(MSB) 31(LSB) Word Sign-extended (LDB instruction) or zero-extended (LDUB instruction) From memory (LDB, LDUB instructions) <When storing> Rn 0(MSB) 31(LSB) Byte Rn 0(MSB) 31(LSB) Halfword Rn 0(MSB) 31(LSB) Word To memory (STB instruction) To memory (STH instruction) To memory (ST instruction) From memory (LDH, LDUH instructions) From memory (LD instructions) Sign-extended (LDH instruction) or zero-extended (LDUH instruction) 24 16 24 16 |
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