32172 datasheet(30/875 Pages) RENESAS

30 / 875 page

1-9

Rev.1.0

Overview

1.2 Block Diagram

Table 1.2.3

Features of Internal Peripheral I/Os

Functional Block

Features

DMA

• 10-channel DMA

• Supports data transfer between internal peripheral I/Os, between internal RAMs,

and between internal peripheral I/O and internal RAM

• Capable of fast DMA transfer when used in combination with internal peripheral I/O

• Capable of cascaded operation between DMA channels (starting DMA transfer on

a channel at the end of transfer on another)

Timer

• 26-channel multifunction timers

• 16 channels of 16-bit output related timers, 6 channels of 16-bit input related

timers, and 4 channels of 32-bit input related timers

• Flexible timer configuration is possible by interconnecting each timer channel

A-D converter

• One 8-channel A-D converter and one 4-channel A-D converter, both capable of

10-bit resolution

• Supports comparator mode

• Can generate an interrupt or start DMA transfer at completion of A-D conversion

• Can monitor pin levels on a total of 20 channels (with reduced accuracy, however)

Serial I/O

• 8-channel serial I/O

• Can be set for clock-synchronized serial I/O or UART

• Capable of fast data transfer at 2 Mbits/second during clock-synchronized mode or

156 Kbits/second during UART mode

Real-time debugger

• Can rewrite/monitor the internal RAM by command input from the outside,

independently of the CPU

• Comes with dedicated clock-synchronized serial port

Interrupt controller

• Controls interrupt requests from internal peripheral I/Os

• Eight priority levels including interrupt-disabled state

Wait controller

• Controls wait state when accessing external extended area

• Inserts 1 to 4 wait cycles by software setting + extends wait period by external

____

WAIT signal input

Clock PLL

• Multiply-by-4 clock generating circuit

• CPU clock of maximum 40 MHz (CPU, internal ROM, and internal RAM access)

• Internal peripheral clock of maximum 20 MHz (peripheral module access)

• Maximum external input clock frequency of 10.0 MHz

D-A converter

• Two channels of 8-bit resolution D-A converters

D-A0 converter: D-A output, successive data output function, 256-byte output

buffer available

D-A1 converter: D-A output only

PD Controller

• Two blocks of PD sensor-accommodating timers and various arithmetic circuits for

position predictive operation

• 16-bit input measurement timer: 4 channels; 16-bit input related timer: 4 channels

• When not using the PD circuit, the above timers can be used as input

measurement timers or input event counters

CAN

• Two blocks of CAN modules, each with 16-channel message slots

JTAG

• Boundary scan function, Mitsubishi original SDI debug function included

32172 Datasheet(PDF) 30 Page - Renesas Technology Corp

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