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32172 Datasheet(PDF) 56 Page - Renesas Technology Corp |
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32172 Datasheet(HTML) 56 Page - Renesas Technology Corp |
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56 / 875 page ![]() 2 2-11 Rev.1.0 CPU 2.6 Data Formats • Constant transfer LD24 Rdest, #imm24 LDI Rdest, #imm16 LDI Rdest, #imm8 SETH Rdest, #imm16 23 0 Rdest imm24 31 0 LD24 Rdest, #imm24 15 0 Rdest imm16 31 0 SETH Rdest, #imm16 00 8 15 00 00 • Register to register transfer MV Rdest, Rsrc • Control register transfer MVFC Rdest, CRsrc MVTC Rsrc, CRdest Note: For the MVTC instruction, the condition bit C does not change unless CRdest is CR0 (PSW). Rsrc 31 0 Rdest 31 0 Rsrc 31 0 CRdest 31 0 MVTC Rsrc, CRdest MV Rdest, Rsrc (4) Transfer instructions Figure 2.6.6 Transfer instructions |
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