32172 datasheet(67/875 Pages) RENESAS

67 / 875 page

3-8

Rev.1.0

ADDRESS SPACE

3.3 Internal ROM and External Extended Areas

The 8-Mbyte area in user space addresses from H'0000 0000 to H'007F FFFF is used for the

internal ROM and external extended areas.

For details on how the locations of the internal ROM and external extended areas vary depending

on 32172/32173 operation mode settings, refer to Section 3.2, "Operation Modes."

3.3.1 Internal ROM Area

The internal ROM is allocated to the addresses listed below. Located at the beginning of this area

is the EIT vector entry (and ICU vector table).

Table 3.3.1 Internal ROM Area

Type Name

Size

Location Address

M32172F2 , M32173F2

256 Kbytes

H'0000 0000-H'0003 FFFF

3.3.2 External Extended Area

The external extended area is available only when external extended or processor mode is

selected for the chip operation mode. For access to the external extended area, the 32172/32173

outputs the control signals that are required for accessing an external device.

___ ___ ___

___

The 32172/32173's CS0, CS1, CS2, and CS3 signals are output according to the address into

___

which the external extended area is mapped. Namely, the CS0 signal is output for the CS0 area,

___

the CS1 signal is output for the CS1 area, the CS2 sognal is output for the CS2 area, and the CS3

signal is output for the CS3 area.

Table 3.3.2 Address Mapping of the External Extended Area in Each Operation Mode of the

32172/32173

Operation Mode

Address Mapping of External Extended Area

Single-chip mode

None

External extended mode

Addresses H'0010 0000 to H'001F FFFF (CS0 area: 1 Mbytes)

Addresses H'0020 0000 to H'003F FFFF (CS1 area: 2 Mbytes)

Addresses H'0040 0000 to H'005F FFFF (CS2 area: 2 Mbytes)

Addresses H'0060 0000 to H'007F FFFF (CS3 area: 2 Mbytes)

Processor mode

Addresses H'0000 0000 to H'001F FFFF (CS0 area: 2 Mbytes)

Addresses H'0020 0000 to H'003F FFFF (CS1 area: 2 Mbytes)

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