32172 datasheet(64/875 Pages) RENESAS

64 / 875 page

3-5

Rev.1.0

ADDRESS SPACE

3.2 Operation Modes

The 32172/32173 is placed in one of the following modes by settings of chip operation mode

(setting the MOD0 and MOD1 pins) . For details about internal flash memory rewrite mode, refer to

Section 6.5, "Programming the Internal Flash Memory."

Table 3.2.1 Setting Operation Modes

MOD0

MOD1 (Note 1)

Operation mode (Note 2)

VSS

Single-chip mode

VSS

VCC

External extended mode

VCC

VSS

Processor mode (FP = VSS)

VCC

Reserved (use inhibited)

Note 1: VCC and VSS are connected to +5 V and GND, respectively.

Note 2: For internal flash memory rewrite mode (when FP=VCC) not listed in the above table, refer to

Section 6.5, "Programming the Internal Flash Memory."

The locations of the internal ROM and external extended areas in the address space of the 32172/

32173 vary depending on its operation mode. (All other areas in address space located the same

way.) Also, during external extended mode, the available size of the external extended area varies

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with pin functions of CS0, CS1, CS2, and CS3. Figure 3.2.1 shows an address map of internal

ROM and external extended areas in each mode. Figure 3.2.2 shows an address map of internal

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ROM and external extended areas varying with pin functions of CS0, CS1, CS2, and CS3 during

external extended mode. (For details about internal flash memory rewrite mode, refer to Section

6.5, "Programming the Internal Flash Memory.")

32172 Datasheet(PDF) 64 Page - Renesas Technology Corp