ATmega32U2 datasheet(185/314 Pages) ATMEL

185 / 314 page

185

7799B–AVR–07/09

ATmega8U2/16U2/32U2

20. USB Controller

20.1

Features

• USB 2.0 Full-speed device

• Ping-pong mode (dual bank), with transparent switch

• 176 bytes of DPRAM

– 1 endpoint of 64 bytes max (default control endpoint)

– 2 endpoints of 64 bytes max (one bank)

– 2 endpoints of 64 bytes max (one or two banks)

20.2

Overview

The USB controller provides the hardware to implement a USB2.0 compliant Full-Speed USB

device in the ATmega8U2/16U2/32U2. A simplified block diagram of the USB controller is shown

in Figure 20-1 on page 185.

The USB controller requires a 48 MHz ±0.25% reference clock for USB Full-Speed compliance.

This clock is generated by an internal PLL. The reference clock to the PLL must be provided

from an external crystal or an external clock input. Only these two clock options will be able to

provide a reference clock within the accuracy and jitter requirements of the USB specification.

See section “ S ystem Clock and Clock Options” on page 26 for details on the

ATmega8U2/16U2/32U2 system clock and clock options.

To comply to the USB specifications electrical characteristics, the USB Pads (D+ or D-) must be

powered at 3.0V to 3.6V. As the ATmega8U2/16U2/32U2 can be powered up to 5.5V, an inter-

nal regulator is provided to correctly power the USB pads. See “USB Module Powering Options”

on page 186 for details on the powering options available for the USB controller

Figure 20-1. USB controller Block Diagram

CPU

Regulator

USB

Interface

PLL

clk

8MHz

clk

48MHz

PLL clock

Prescaler

On-Chip

USB DPRAM

DPLL

Clock

Recovery

UCAP

D-

D+

UVCC

XTAL1

ATmega32U2 Datasheet(PDF) 185 Page - ATMEL Corporation

ATmega32U2 Datasheet(HTML) 185 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL