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ST7735 Datasheet(PDF) 71 Page - Sitronix Technology Co., Ltd. |
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ST7735 Datasheet(HTML) 71 Page - Sitronix Technology Co., Ltd. |
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71 / 166 page ![]() ST7735 V1.7 71 2009-12-04 9.16 Reset Timing Table 9.16.1 Reset timing Related Pins Symbol Parameter MIN MAX Unit tRESW Reset pulse duration 10 - us - 5 ms RESX tREST Reset cancel 120 ms Notes: 1. The reset cancel includes also required time for loading ID bytes, VCOM setting and other settings from EEPROM (or similar device) to registers. This loading is done every time when there is HW reset cancel time (tRT) within 5 ms after a rising edge of RESX. 2. Spike due to an electrostatic discharge on RESX line does not cause irregular system reset according to the table below: RESX Pulse Action Shorter than 5us Reset Rejected Longer than 9us Reset Between 5us and 9us Reset starts 3. During the Resetting period, the display will be blanked (The display is entering blanking sequence, which maximum time is 120 ms, when Reset Starts in Sleep Out –mode. The display remains the blank state in Sleep In -mode.) and then return to Default condition for Hardware Reset. 4. Spike Rejection also applies during a valid reset pulse as shown below: 5. When Reset applied during Sleep In Mode. 6. When Reset applied during Sleep Out Mode. 7. It is necessary to wait 5msec after releasing RESX before sending commands. Also Sleep Out command cannot be sent for 120msec. |
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