LPC3131 datasheet(21/68 Pages) NXP

Part #	LPC3131

Description	Low-cost, low-power ARM926EJ-S MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller

PDF	68 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

21 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

21 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

• Level interrupt support.

The following blocks can generate interrupts:

• NAND ﬂash controller

• USB 2.0 high-speed OTG

• Event router

• 10-bit ADC

• UART

• LCD

• MCI

• SPI

• I2C0 and I2C1 controllers

• Timer0, Timer1, Timer2, and Timer3

• I2S transmit: I2STX_0 and I2STX_1

• I2S receive: I2SRX_0 and I2SRX_1

• DMA

6.13 Multi-layer AHB

The multi-layer AHB is an interconnection scheme based on the AHB protocol that

enables parallel access paths between multiple masters and slaves in a system.

Multiple masters can have access to different slaves at the same time.

Figure 5 gives an overview of the multi-layer AHB conﬁguration in the LPC3130/3131.

AHB masters and slaves are numbered according to their AHB port number.

LPC3131 Datasheet(PDF) 21 Page - NXP Semiconductors