LPC3131 datasheet(34/68 Pages) NXP

34 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

34 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

The EBI unit between the NAND ﬂash interface and the MPMC contains an arbiter that

determines which interface is muxed to the outside world. Both NAND ﬂash and

SDRAM/SRAM initiate a request to the EBI unit. This request is granted using round-robin

arbitration (see Section 6.6).

6.26.3 Supply domains

As is shown in Figure 9 the EBI (NAND ﬂash/MPMC-control/data) is connected to a

different supply domain than the LCD interface. The EBI control and address signals are

muxed with the LCD interface signals and are part of supply domain SUP8. The

SDRAM/SRAM data lines are shared with the NAND ﬂash through the EBI and are part of

supply domain SUP4. Therefore the following rules apply for connecting memories:

1. SDRAM and bus-based LCD or SRAM: This is the MPMC mode. The supply voltage

for SDRAM/SRAM/bus-based LCD and NAND ﬂash must be the same.The dedicated

LCD interface is not available in this MPMC mode.

2. Dedicated LCD interface only: This is the LCD mode. The NAND ﬂash supply voltage

(SUP4) can be different from the LCD supply voltage (SUP8).

6.27 Timer module

The LPC3130/3131 contains four fully independent timer modules, which can be used to

generate interrupts after a pre-set time interval has elapsed.

This module has the following features:

• Each timer is a 32 bit wide down-counter with selectable pre-scale. The pre-scaler

allows using either the module clock directly or the clock divided by 16 or 256.

• Two modes of operation:

– Free-running timer: The timer generates an interrupt when the counter reaches

zero. The timer wraps around to 0xFFFFFFFF and continues counting down.

– Periodic timer: The timer generates an interrupt when the counter reaches zero. It

reloads the value from a load register and continues counting down from that

value. An interrupt will be generated every time the counter reaches zero. This

effectively gives a repeated interrupt at a regular interval.

• At any time the current timer value can be read.

• At any time the value in the load register may be re-written, causing the timer to

restart.

6.28 Pulse Width Modulation (PWM) module

This PWM can be used to generate a pulse width modulated or a pulse density modulated

signal. With an external low pass ﬁlter, the module can be used to generate a

low-frequency analog signal. A typical use of the output of the module is to control the

backlight of an LCD display.

This module has the following features:

• Supports Pulse Width Modulation (PWM) with software controlled duty cycle.

• Supports Pulse Density Modulation (PDM) with software controlled pulse density.

LPC3131 Datasheet(PDF) 34 Page - NXP Semiconductors

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