LPC3131 datasheet(59/68 Pages) NXP

59 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

59 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

9.9 USB interface

[1]

Characterized but not implemented as production test. Guaranteed by design.

Remark: Signals SDA and SCL correspond to pins I2C_SDAx and I2C_SCLx (x = 0, 1).

Fig 27. I2C-bus pins clock timing

002aad985

tHD;STA

tBUF

tHD;STA

tSU;STA

tSU;DAT

tHIGH

tSU;STO

tHD;STA

tLOW

SDA

SCL

Table 25.

Dynamic characteristics: USB pins (high-speed)

CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD(IO) (SUP3), unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

rise time

10 % to 90 %

<tbd>

fall time

10 % to 90 %

<tbd>

tFRFM

differential rise and fall time

matching

tr /tf

<tbd>

VCRS

output signal crossover voltage

<tbd>

tFEOPT

source SE0 interval of EOP

see Figure 28

<tbd>

tFDEOP

source jitter for differential transition

to SE0 transition

see Figure 28

<tbd>

tJR1

receiver jitter to next transition

<tbd>

tJR2

receiver jitter for paired transitions

10 % to 90 %

<tbd>

tEOPR1

EOP width at receiver

must reject as

EOP; see

Figure 28

[1] <tbd>

tEOPR2

EOP width at receiver

must accept as

EOP; see

Figure 28

[1] <tbd>

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