LPC3131 datasheet(29/68 Pages) NXP

29 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

29 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

• SIR-IrDA encoder/decoder (from 2400 to 115 kBd).

• Supports maskable interrupts.

• Supports DMA transfers.

6.23 Pulse Code Modulation (PCM) interface

The PCM interface supports the PCM and IOM interfaces.

The IOM (ISDN Oriented Modular) interface is primarily used to interconnect

telecommunications ICs providing ISDN compatibility. It delivers a symmetrical full-duplex

communication link containing user data, control/programming lines, and status channels.

PCM (Pulse Code Modulation) is a very common method used for transmitting analog

data in digital format. Most common applications of PCM are digital audio as in Audio CD

and computers, digital telephony and videos.

This module has the following features:

• Four-wire serial interface.

• Can function in both Master and Slave modes.

• Supports:

– PCM: Single clocking physical format.

– Multi-Protocol (MP) PCM: Conﬁgurable directional per slot.

– IOM-2: Extended ISDN-Oriented modular. Double clocking physical format.

• Twelve eight bit slots in a frame with enabling control per slot.

• Internal frame clock generation in master mode.

• Receive and transmit DMA handshaking using a request/clear protocol.

• Interrupt generation per frame.

6.24 LCD interface

The dedicated LCD interface contains logic to interface to a 6800 (Motorola) or 8080

(Intel) compatible LCD controllers which support 4/8/16 bit modes. This module also

supports a serial interface mode. The speed of the interface can be adjusted in software

to match the speed of the connected LCD display.

This module has the following features:

• 4/8/16 bit parallel interface mode: 6800-series, 8080-series.

• Serial interface mode.

• Supports multiple frequencies for the 6800/8080 bus to support high- and low-speed

controllers.

• Supports polling the busy ﬂag from LCD controller to off-load the CPU from polling.

• Contains an 16 byte FIFO for sending control and data information to the LCD

controller.

• Supports maskable interrupts.

• Supports DMA transfers.

LPC3131 Datasheet(PDF) 29 Page - NXP Semiconductors

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