LPC3131 datasheet(52/68 Pages) NXP

52 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

52 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

9.4 NAND ﬂash memory controller

[1]

THCLK = 1/NANDFLASH_NAND_CLK, see LPC3130/3131 user manual.

[2]

See registers NandTiming1 and NandTiming2 in the LPC3130/3131

user manual.

Table 19.

Dynamic characteristics of the NAND ﬂash memory controller

Tamb = −40 °C to +85 °C, unless otherwise speciﬁed.

Symbol

Parameter

Typical

Unit

tREH

RE HIGH hold time

[1][2]

THCLK x (TREH+1)

tRP

RE pulse width

[1][2]

THCLK x (TRP + 1)

tWH

WE HIGH hold time

[1][2]

THCLK x (TWH + 1)

tWP

WE pulse width

[1][2]

THCLK x (TWP + 1)

tCLS

CLE set-up time

[1][2]

THCLK x (TCLS + 1)

tCLH

CLE hold time

[1][2]

THCLK x (TCLH + 1)

tALS

ALE set-up time

[1][2]

THCLK x (TALS + 1)

tALH

ALE hold time

[1][2]

THCLK x (TALH + 1)

tCS

CE set-up time

[1][2]

THCLK x (TCS + 1)

tCH

CE hold time

[1][2]

THCLK x (TCH + 1)

Fig 19.

NAND ﬂash controller write and read timing

EBI_NWE

EBI_A_1_CLE

EBI_A_0_ALE

tWP

tCS

tCH

tCLS

tCLH

mNAND_NCS

tWH

002aae353

tALS

tALH

tRP tREH

EBI_DQM_0_NOE

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