LPC3131 datasheet(43/68 Pages) NXP

43 / 68 page

LPC3130_3131_1

Preliminary data sheet

Rev. 1 — 9 February 2009

43 of 68

NXP Semiconductors

LPC3130/3131

Low-cost, low-power ARM926EJ-S microcontrollers

Dynamic characteristics

9.1 LCD controller

9.1.1 Intel 8080 mode

[1]

Timing is determined by the LCD Interface Control Register ﬁelds: INVERT_CS = 1; MI = 0; PS = 0;

INVERT_E_RD = 0. See LPC3130/3131

user manual.

Table 14.

Dynamic characteristics: LCD controller in Intel 8080 mode

CL =25pF, Tamb = −40 °C to +85 °C, unless otherwise speciﬁed; VDD(IO) = 1.8 V and 2.8 V (SUP8).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tsu(A)

address set-up time

× LCDCLK -

th(A)

address hold time

× LCDCLK -

tcy(a)

access cycle time

[1]

-5

× LCDCLK -

tw(en)W

write enable pulse width

[1]

-2

× LCDCLK -

tw(en)R

read enable pulse width

[1]

-2

× LCDCLK -

rise time

fall time

tsu(D)

data input set-up time

<tbd>

th(D)

data input hold time

<tbd>

td(QV)

data output valid delay time

−1 × LCDCLK -

tdis(Q)

data output disable time

× LCDCLK -

Fig 12. LCD timing (Intel 8080 mode)

002aae207

mLCD_RS

mLCD_CSB

mLCD_RW_WR,

mLCD_E_RD

mLCD_DB[15:0] (16 bit mode),

mLCD_DB[15:8] (8 bit mode),

mLCD_DB[15:12] (4 bit mode)

mLCD_DB[15:0] (16 bit mode),

mLCD_DB[15:8] (8 bit mode),

mLCD_DB[15:12] (4 bit mode)

th(A)

tsu(A)

tw(en)R and tw(en)W

td(QV)

tdis(Q)

tsu(D)

th(D)

tcy(a)

read access

write access

LPC3131 Datasheet(PDF) 43 Page - NXP Semiconductors

LPC3131 Datasheet(HTML) 43 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL