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ADT7467ARQZ-R7 Datasheet(PDF) 44 Page - ON Semiconductor |
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ADT7467ARQZ-R7 Datasheet(HTML) 44 Page - ON Semiconductor |
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44 / 77 page ![]() ADT7467 Rev. 3 | Page 44 of 77 | www.onsemi.com Programming the PWMMIN Registers The PWMMIN registers are 8-bit registers that allow the minimum PWM duty cycle for each output to be configured from 0% to 100%. This allows the minimum PWM duty cycle to be set in steps of 0.39%. The value to be programmed into the PWMMIN register is given by Value (decimal) = PWMMIN/0.39% Example 1: For a minimum PWM duty cycle of 50%, Value (decimal) = 50%/0.39% = 128 (decimal) Value = 128 (decimal) or 0x80 (hexadecimal) Example 2: For a minimum PWM duty cycle of 33%, Value (decimal) = 33%/0.39% = 85 (decimal) Value = 85 (decimal)l or 0x54 (hexadecimal) PWMMIN Registers Register 0x64, PWM1 minimum duty cycle = 0x80 (50% default) Register 0x65 PWM2 minimum duty cycle = 0x80 (50% default) Register 0x66, PWM3 minimum duty cycle = 0x80 (50% default) Fan Speed and PWM Duty Cycle The PWM duty cycle does not directly correlate to fan speed in RPM. Running a fan at 33% PWM duty cycle does not equate to running the fan at 33% speed. Driving a fan at 33% PWM duty cycle runs the fan at closer to 50% of its full speed, because fan speed as a percentage of RPM generally relates to the square root of the PWM duty cycle. Given a PWM square wave as the drive signal, fan speed in RPM approximates to 10 % × = cycle duty PWM speed fan STEP 5: PWMMAX FOR PWM (FAN) OUTPUTS PWMMAX is the maximum duty cycle that each fan in the system runs at during the automatic fan speed control loop. For maximum system acoustic benefit, PWMMAX should be as low as possible but capable of keeping the processor below its maximum temperature limit, even in a worst-case scenario. If the THERM temperature limit is exceeded, the fans are still boosted to 100% for fail-safe cooling. There is a PWMMAX limit for each fan channel. The default value of this register is 0xFF and, therefore, has no effect unless it is programmed. TEMPERATURE TMIN 100% PWMMIN 0% PWMMAX Figure 60. PWMMAX Determines Maximum PWM Duty Cycle Below the THERM Temperature Limit Programming the PWMMAX Registers The PWMMAX registers are 8-bit registers that allow the maximum PWM duty cycle for each output to be configured from 0% to 100%. This allows the maximum PWM duty cycle to be set in steps of 0.39%. The value to be programmed into the PWMMAX register is given by Value (decimal) = PWMMAX/0.39% Example 1: For a maximum PWM duty cycle of 50%, Value (decimal) = 50%/0.39% = 128 (decimal) Value = 128 (decimal) or 0x80 (hexadecimal) Example 2: For a minimum PWM duty cycle of 75%, Value (decimal) = 75%/0.39% = 192 (decimal) Value = 192 (decimal) or 0xC0 (hexadecimal) PWMMAX Registers Register 0x38, PWM1 maximum duty cycle = 0xFF (100% default) Register 0x39, PWM2 maximum duty cycle = 0xFF (100% default) Register 0x3A, PWM3 maximum duty cycle = 0xFF (100% default) See the Fan Speed and PWM Duty Cycle section. |
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