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ADT7467ARQZ-R7 Datasheet(PDF) 73 Page - ON Semiconductor |
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ADT7467ARQZ-R7 Datasheet(HTML) 73 Page - ON Semiconductor |
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73 / 77 page  ADT7467 Rev. 3 | Page 73 of 77 | www.onsemi.com Table 51. Register 0x74—Interrupt Mask 1 Register (Power-On Default = 0x00) Bit Name R/W Description <1> VCCP Read/write VCCP = 1 masks SMBALERT for out-of-limit conditions on the VCCP channel. <2> VCC Read/write VCC = 1 masks SMBALERT for out-of-limit conditions on the VCC channel. <4> R1T Read/write R1T = 1 masks SMBALERT for out-of-limit conditions on the Remote 1 temperature channel. <5> LT Read/write LT = 1 masks SMBALERT for out-of-limit conditions on the local temperature channel. <6> R2T Read/write R2T = 1 masks SMBALERT for out-of-limit conditions on the Remote 2 temperature channel. <7> OOL Read/write OOL = 1 masks SMBALERT for any out-of-limit condition in Interrupt Status Register 2. Table 52. Register 0x75—Interrupt Mask 2 Register (Power-On Default = 0x00) Bit Name R/W Description <1> OVT Read/write OVT = 1 masks SMBALERT for overtemperature THERM conditions. <2> FAN1 Read/write FAN1 = 1 masks SMBALERT for a Fan 1 fault. <3> FAN2 Read/write FAN2 = 1 masks SMBALERT for a Fan 2 fault. <4> FAN3 Read/write FAN3 = 1 masks SMBALERT for a Fan 3 fault. <5> F4P Read/write F4P = 1 masks SMBALERT for a Fan 4 fault. If the TACH4 pin is used as the THERM input, this bit masks SMBALERT for a THERM timer event. <6> D1 Read/write D1 = 1 masks SMBALERT for a diode open or short on a Remote 1 channel. <7> D2 Read/write D2 = 1 masks SMBALERT for a diode open or short on a Remote 2 channel. Table 53. Register 0x76—Extended Resolution Register 1 (Power-On Default = 0x00)1 Bit Name R/W Description <3:2> VCCP R/W VCCP LSBs. Holds the 2 LSBs of the 10-bit VCCP measurement. <5:4> VCC R/W VCC LSBs. Holds the 2 LSBs of the 10-bit VCC measurement. 1 If this register is read, this register and the registers holding the MSB of each reading are frozen until read. Table 54. Register 0x77—Extended Resolution Register 2 (Power-On Default = 0x00)1 Bit Name R/W Description <3:2> TDM1 R/W Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature measurement. <5:4> LTMP R/W Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement. <7:6> TDM2 R/W Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature measurement. 1 If this register is read, this register and the registers holding the MSB of each reading are frozen until read. Table 55. Register 0x78—Configuration Register 3 (Power-On Default = 0x00) Bit Name R/W1 Description <0> ALERT Enable Read/write ALERT = 1, Pin 5 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-limit error conditions. <1> THERM Read/write THERM Enable = 1 enables THERM timer monitoring functionality on Pin 9. Also determined by Bit 0 and Bit 1 (Pin 9 Func) of Configuration Register 4. When THERM is asserted, the fans run at full speed if the fans are running and the boost bit is set. Alternatively, THERM can be programmed so that a timer is triggered to time how long THERM has been asserted. <2> BOOST Read/write When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the maximum programmed duty cycle for fail-safe cooling. <3> FAST Read/write FAST = 1 enables fast TACH measurements on all channels. This increases the TACH measurement rate from once per second to once every 250 ms (4 ×). <4> DC1 Read/write DC1 = 1 enables TACH measurements to be continuously made on TACH1. Fans must be driven by dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors. <5> DC2 Read/write DC2 = 1 enables TACH measurements to be continuously made on TACH2. Fans must be driven by dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors. <6> DC3 Read/write DC3 = 1 enables TACH measurements to be continuously made on TACH3. Fans must be driven by dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors. <7> DC4 Read/write DC4 = 1 enables TACH measurements to be continuously made on TACH4. Fans must be driven by dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors. 1 This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail. |
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